Books

• D. A. Hodges, H. G. Jackson, and R. A. Saleh, Analysis and Design of Digital Integrated Circuits: In Deep Submicron Technology, 3rd ed., McGraw-Hill Series in Electrical Engineering, Vol. 3118, Boston, MA: McGraw-Hill Higher Education, 2003.
• D. A. Hodges and H. G. Jackson, Analysis and Design of Digital Integrated Circuits, 2nd ed., New York: McGraw-Hill, 1988.
• D. A. Hodges and H. G. Jackson, Analysis and Design of Digital Integrated Circuits, McGraw-Hill Series in Electrical Engineering: Electronics and Electronic Circuits, New York: McGraw-Hill, 1983.
• P. R. Gray, D. A. Hodges, and R. W. Brodersen, Eds., Analog MOS Integrated Circuits, IEEE Press Selected Reprint Series, New York: IEEE Press; sole worldwide distributor exclusive of the IEEE, Wiley, 1980.
• D. A. Hodges, Ed., Semiconductor Memories, IEEE Press Selected Reprint Series, New York: IEEE Press, 1972.

Articles in journals or magazines

• R. C. Leachman and D. A. Hodges, "Benchmarking semiconductor manufacturing," IEEE Trans. Semiconductor Manufacturing, vol. 9, no. 2, pp. 158-169, May 1996.
• J. Pendleton, S. Kong, E. Brown, F. Dunlap, C. Marino, D. Ungar, D. A. Patterson, and D. A. Hodges, "A 32b Microprocessor for Smalltalk," IEEE Journal of Solid-State Circuits, vol. SC-21, no. 5, pp. 741-749, Oct. 1986.
• O. Agazzi, D. G. Messerschmitt, and D. A. Hodges, "Nonlinear echo cancellation of data signals," IEEE Trans. Communications, vol. 30, no. 11, pp. 2421-2433, Nov. 1982.
• O. Agazzi, D. A. Hodges, and D. G. Messerschmitt, "Large-scale integration of hybrid-method digital subscriber loops," IEEE Trans. Communications, vol. 30, no. 9, pp. 2095-2108, Sep. 1982.
• I. A. Young and D. A. Hodges, "MOS switched-capacitor analog sampled-data direct-form recursive filters," IEEE J. Solid-State Circuits, vol. 14, no. 6, pp. 1020-1033, Dec. 1979.
• R. W. Brodersen, P. R. Gray, and D. A. Hodges, "MOS switched-capacitor filters," Proc. IEEE, vol. 67, no. 1, pp. 61-75, Jan. 1979.
• D. A. Hodges, P. R. Gray, and R. W. Brodersen, "Potential of MOS technologies for analog integrated circuits," IEEE J. Solid-State Circuits, vol. SC-13, no. 3, pp. 285-294, June 1978.
• R. E. Suarez, P. R. Gray, and D. A. Hodges, "All-MOS charge-redistribution analog-to-digital conversion techniques. II.," IEEE J. Solid-State Circuits, vol. SC-10, no. 6, pp. 379-385, Dec. 1975.
• D. A. Hodges, "Large-capacity semiconductor memory," Proc. IEEE, vol. 56, no. 7, pp. 1148-1162, July 1968.

Articles in conference proceedings

• D. A. Hodges, L. A. Rowe, and C. J. Spanos, "Computer integrated manufacturing," in Proc. 7th IEEE/CHMT Intl. Electronic Manufacturing Technology Symp. (IEMT 1989), Piscataway, NJ: IEEE Press, 1989, pp. 1-3.
• R. E. Suarez, P. R. Gray, and D. A. Hodges, "An all-MOS charge-redistribution A/D conversion technique," in 1974 IEEE Intl. Solid-State Circuits Conf. Digest of Technical Papers, Vol. 17, New York, NY: IEEE, 1974, pp. 194-195.

Technical Reports

• D. Lee, D. Jeong, D. A. Wood, D. A. Patterson, M. D. Hill, S. I. Kong, G. S. Taylor, D. A. Hodges, S. J. Eggers, G. A. Gibson, and R. H. Katz, "A VLSI Chip Set for a Mutiprocessor Workstation," EECS Department, University of California, Berkeley, Tech. Rep. UCB/CSD-89-500, April 1989.
• Y. Nakagome, G. Uvieghara, and D. A. Hodges, "Multiport Memory Design Considerations for Parallel Execution CPU Architectures," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M88/83, Dec. 1988.
• M. D. Hill, S. J. Eggers, J. R. Larus, G. S. Taylor, G. D. Adams, B. K. Bose, G. A. Gibson, P. M. Hansen, J. Keller, S. I. Kong, C. G. Lee, D. Lee, J. M. Pendleton, S. A. Ritchie, D. A. Wood, B. G. Zorn, P. N. Hilfinger, D. A. Hodges, R. H. Katz, J. K. Ousterhout, and D. A. Patterson, "SPUR: A VLSI Multiprocessor Workstation," EECS Department, University of California, Berkeley, Tech. Rep. UCB/CSD-86-273, Dec. 1985.
• N. Lin, D. A. Hodges, and D. G. Messerschmitt, "Partial Response Coding in Digital Subscriber Loops," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M85/37, May 1985.
• T. Doernberg, H. Lee, and D. A. Hodges, "Full-Speed Testing of A/D Converters," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M84/38, May 1984.
• O. Agazzi, C. Tzeng, D. G. Messerschmitt, and D. A. Hodges, "Timing Recovery in Digital Subscriber Loops," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M83/71, Dec. 1983.
• O. Agazzi, D. Hodges, and D. Messerschmitt, "Large Scale Integration of Hybrid-Method Digital Subscriber Loops," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M82/9, Feb. 1982.
• R. Brodersen, P. Gray, and D. Hodges, "MOS Switched -Capacitor Filters," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M78/70, May 1978.
• D. Senderowicz, D. Hodges, and P. Gray, "High-Performance NMOS Operational Amplifier," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M78/29, March 1978.
• D. Hodges, D. Pederson, and R. Pepper, "Systematic Generation of Monostable and Counting Bistable Circuits," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M92, Aug. 1964.
• D. Hodges, "High-Performance Field-Effect Transistors Formed by Impurity Redistribution," EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M58, Feb. 1964.

Patents

• J. Doernberg, P. R. Gray, and D. A. Hodges, "Flash A/D converter using capacitor arrays," U.S. Patent 4,742,330. May 1988.
• D. A. Hodges, P. R. Gray, and J. L. McCreary, "Weighted capacitor analog/digital converting apparatus and method," U.S. Patent 4,200,863. April 1980.
• P. R. Gray, J. L. McCreary, and D. A. Hodges, "Weighted capacitor analog/digital converting apparatus and method," U.S. Patent 4,129,863. Dec. 1978.
• D. A. Hodges, "Field effect transistor memory cell," U.S. Patent RE28,905. July 1976.
• D. A. Hodges, "Double-clamped Schottky transistor logic gate circuit," U.S. Patent 3,751,680. Aug. 1973.
• D. A. Hodges and M. P. Lepselter, "Schottky barrier diodes as impedance elements," U.S. Patent 3,585,412. June 1971.
• D. A. Hodges, "Field effect transistor memory cell," U.S. Patent 3,540,007. Nov. 1970.