Specifying Integrated Circuit Photolithography Processes Using Heuristic and Algorithmic Techniques (Computer-Aided Design, Expert System)
Michael F. Klein
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M85/73
1985
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http://www2.eecs.berkeley.edu/Pubs/TechRpts/1985/Archive/ERL-85-73.pdf
Advisors: David A. Hodges
BibTeX citation:
@phdthesis{Klein:M85/73,
Author= {Klein, Michael F.},
Title= {Specifying Integrated Circuit Photolithography Processes Using Heuristic and Algorithmic Techniques (Computer-Aided Design, Expert System)},
School= {EECS Department, University of California, Berkeley},
Year= {1985},
Month= {Sep},
Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1985/560.html},
Number= {UCB/ERL M85/73},
}
EndNote citation:
%0 Thesis %A Klein, Michael F. %T Specifying Integrated Circuit Photolithography Processes Using Heuristic and Algorithmic Techniques (Computer-Aided Design, Expert System) %I EECS Department, University of California, Berkeley %D 1985 %@ UCB/ERL M85/73 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1985/560.html %F Klein:M85/73