CNS-1 Architecture Specification

Krste Asanović, James Beck, Tim Callahan, Jerry Feldman, Bertrand S. Irissou, Brian Kingsbury, Phil Kohn, John Lazzaro, Nelson Morgan, David Stoutamire and John Wawrzynek

EECS Department
University of California, Berkeley
Technical Report No. UCB/CSD-93-747
1993

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/CSD-93-747.pdf

In the past two decades, the fields of VLSI systems design and massively parallel computation have grown into mature disciplines. Both fields began as research topics in industrial and academic laboratories; today, they form the core technologies for several large corporations. This report proposes a massively parallel computer, the Connectionist Network Supercomputer (CNS-1), which leverages off these fields. By targeting the computer to connectionist networks and related applications, we can focus on custom chip design and efficient software to achieve performance goals which challenge the best that the industry has to offer.


BibTeX citation:

@techreport{Asanović:CSD-93-747,
    Author = {Asanović, Krste and Beck, James and Callahan, Tim and Feldman, Jerry and Irissou, Bertrand S. and Kingsbury, Brian and Kohn, Phil and Lazzaro, John and Morgan, Nelson and Stoutamire, David and Wawrzynek, John},
    Title = {CNS-1 Architecture Specification},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1993},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/6302.html},
    Number = {UCB/CSD-93-747},
    Abstract = {In the past two decades, the fields of VLSI systems design and massively parallel computation have grown into mature disciplines. Both fields began as research topics in industrial and academic laboratories; today, they form the core technologies for several large corporations. This report proposes a massively parallel computer, the Connectionist Network Supercomputer (CNS-1), which leverages off these fields. By targeting the computer to connectionist networks and related applications, we can focus on custom chip design and efficient software to achieve performance goals which challenge the best that the industry has to offer.}
}

EndNote citation:

%0 Report
%A Asanović, Krste
%A Beck, James
%A Callahan, Tim
%A Feldman, Jerry
%A Irissou, Bertrand S.
%A Kingsbury, Brian
%A Kohn, Phil
%A Lazzaro, John
%A Morgan, Nelson
%A Stoutamire, David
%A Wawrzynek, John
%T CNS-1 Architecture Specification
%I EECS Department, University of California, Berkeley
%D 1993
%@ UCB/CSD-93-747
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/6302.html
%F Asanović:CSD-93-747