Low Power Digital CMOS Design
Anantha P. Chandrakasan
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M94/65
, 1994
http://www2.eecs.berkeley.edu/Pubs/TechRpts/1994/ERL-94-65.pdf
Advisors: Robert W. Brodersen
BibTeX citation:
@phdthesis{Chandrakasan:M94/65, Author= {Chandrakasan, Anantha P.}, Title= {Low Power Digital CMOS Design}, School= {EECS Department, University of California, Berkeley}, Year= {1994}, Month= {Aug}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1994/2610.html}, Number= {UCB/ERL M94/65}, }
EndNote citation:
%0 Thesis %A Chandrakasan, Anantha P. %T Low Power Digital CMOS Design %I EECS Department, University of California, Berkeley %D 1994 %@ UCB/ERL M94/65 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1994/2610.html %F Chandrakasan:M94/65