Logic Optimization of FSM Networks Using Input Don't Care Sequences

H-Y Wang and Robert K. Brayton

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M95/42

1995

This publication is archived. It is kept only for reference purposes, so it is no longer being updated and may not meet accessibility standards. If you need this content in a different format, please email webteam@eecs.berkeley.edu.

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/Archive/ERL-95-42.pdf

BibTeX citation:

@techreport{Wang:M95/42,
    Author= {Wang, H-Y and Brayton, Robert K.},
    Title= {Logic Optimization of FSM Networks Using Input Don't Care Sequences},
    Year= {1995},
    Month= {Jun},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2778.html},
    Number= {UCB/ERL M95/42},
}

EndNote citation:

%0 Report
%A Wang, H-Y 
%A Brayton, Robert K. 
%T Logic Optimization of FSM Networks Using Input Don't Care Sequences
%I EECS Department, University of California, Berkeley
%D 1995
%@ UCB/ERL M95/42
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2778.html
%F Wang:M95/42