The Impact of Line Edge Roughness on 100 nm MOSFET Devices
T.T. Nguyen
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M00/27
, 2000
http://www2.eecs.berkeley.edu/Pubs/TechRpts/2000/ERL-00-27.pdf
BibTeX citation:
@techreport{Nguyen:M00/27, Author= {Nguyen, T.T.}, Title= {The Impact of Line Edge Roughness on 100 nm MOSFET Devices}, Year= {2000}, Month= {May}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2000/3844.html}, Number= {UCB/ERL M00/27}, }
EndNote citation:
%0 Report %A Nguyen, T.T. %T The Impact of Line Edge Roughness on 100 nm MOSFET Devices %I EECS Department, University of California, Berkeley %D 2000 %@ UCB/ERL M00/27 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2000/3844.html %F Nguyen:M00/27