Six-Inch CMOS Baseline Process in the UC Berkeley Microfabrication Laboratory
L. Voros and S. Parsa
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M02/39
, 2002
http://www2.eecs.berkeley.edu/Pubs/TechRpts/2002/ERL-02-39.pdf
BibTeX citation:
@techreport{Voros:M02/39, Author= {Voros, L. and Parsa, S.}, Title= {Six-Inch CMOS Baseline Process in the UC Berkeley Microfabrication Laboratory}, Year= {2002}, Month= {Dec}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2002/4038.html}, Number= {UCB/ERL M02/39}, }
EndNote citation:
%0 Report %A Voros, L. %A Parsa, S. %T Six-Inch CMOS Baseline Process in the UC Berkeley Microfabrication Laboratory %I EECS Department, University of California, Berkeley %D 2002 %@ UCB/ERL M02/39 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2002/4038.html %F Voros:M02/39