Martin Schoeberl and Hiren D. Patel and Edward A. Lee

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2009-149

October 30, 2009

In this paper we present example applications using a deadline instruction. The deadline instruction brings cycle accurate timing information into the application code. We have implemented the mechanism in a time-predictable Java chip-multiprocessor. As a proof of the accuracy that can be gained, a digital to analog conversion of audio signals is implemented completely in software. Furthermore, we show how the deadline instruction can be used to verify bytecode execution times on chip-multiprocessors and how to synchronize tasks to a time-division based memory arbiter.

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BibTeX citation:

@techreport{Schoeberl:EECS-2009-149,
    Author= {Schoeberl, Martin and Patel, Hiren D. and Lee, Edward A.},
    Title= {Fun with a Deadline Instruction},
    Year= {2009},
    Month= {Oct},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-149.html},
    Number= {UCB/EECS-2009-149},
    Abstract= {In this paper we present example applications using a deadline instruction. The deadline instruction brings cycle accurate timing information into the application code. We have implemented the mechanism in a time-predictable Java chip-multiprocessor. As a proof of the accuracy that can be gained, a digital to analog conversion of audio signals is implemented completely in software. Furthermore, we
show how the deadline instruction can be used to verify bytecode execution times on chip-multiprocessors and how to synchronize tasks to a time-division based memory arbiter.},
}

EndNote citation:

%0 Report
%A Schoeberl, Martin 
%A Patel, Hiren D. 
%A Lee, Edward A. 
%T Fun with a Deadline Instruction
%I EECS Department, University of California, Berkeley
%D 2009
%8 October 30
%@ UCB/EECS-2009-149
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2009/EECS-2009-149.html
%F Schoeberl:EECS-2009-149