Low Noise Integrated CMOS Receiver Front-End

Ahmed Khidre and Ali Niknejad

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2020-19
February 24, 2020

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2020/EECS-2020-19.pdf

This project presents design and simulation results for a low noise receiver frontend subsystem, which consists of LNA, IQ Mixer, buffer for LO signal, and IF VGA. The cascaded blocks have input return loss of < -15 dB, overall noise figure (NF) of < 5 dB, overall input-referred third-order intercept point (IIP3) of > -26 dBm and input-referred second-order intercept point (IIP2) of > 10 dBm.

Practical biasing circuits are used in blocks simulation to consider performance impairments due to their non-idealities, such as noise. The only ideal source used in simulations is the VDD supply rail. A commercial FD-SOI 28nm CMOS process by STMicroelectronics foundry is used throughout the project.

Advisor: Jan M. Rabaey


BibTeX citation:

@mastersthesis{Khidre:EECS-2020-19,
    Author = {Khidre, Ahmed and Niknejad, Ali},
    Title = {Low Noise Integrated CMOS Receiver Front-End},
    School = {EECS Department, University of California, Berkeley},
    Year = {2020},
    Month = {Feb},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2020/EECS-2020-19.html},
    Number = {UCB/EECS-2020-19},
    Abstract = {This project presents design and simulation results for a low noise receiver frontend subsystem, which consists of LNA, IQ Mixer, buffer for LO signal, and IF VGA. The cascaded blocks have input return loss of < -15 dB, overall noise figure (NF) of < 5 dB, overall input-referred third-order intercept point (IIP3) of > -26 dBm and input-referred second-order intercept point (IIP2) of > 10 dBm.

Practical biasing circuits are used in blocks simulation to consider performance
impairments due to their non-idealities, such as noise. The only ideal source used in simulations is the VDD supply rail. A commercial FD-SOI 28nm CMOS process by STMicroelectronics foundry is used throughout the project.}
}

EndNote citation:

%0 Thesis
%A Khidre, Ahmed
%A Niknejad, Ali
%T Low Noise Integrated CMOS Receiver Front-End
%I EECS Department, University of California, Berkeley
%D 2020
%8 February 24
%@ UCB/EECS-2020-19
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2020/EECS-2020-19.html
%F Khidre:EECS-2020-19