Zichao Ye

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2021-236

December 1, 2021

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-236.pdf

This dissertation focuses on a topological effort to drastically improve the performance of existing power electronics systems. In particular, a hybrid approach is adopted, in which both inductors and capacitors are used in the voltage conversion and power transfer process. Compared to conventional switched-capacitor (SC) converters, the augmenting inductors can greatly reduce or eliminate the capacitor charge sharing loss, and thus improve the energy utilization of the capacitors without sacrificing efficiency. This process is called soft-charging operation. In combination with other potential advantages such as soft switching and voltage regulation, hybrid SC converters show promise in the development of future high-performance power electronics systems.

This dissertation explores hybrid SC converters from three main aspects: fundamental limits and topology comparisons, practical circuit implementation challenges, and high-performance hardware demonstrations. We start by analyzing the reactive power processed by the passive components of hybrid SC converters operating in resonant mode. This analysis is applied to express and optimize the total passive component volume of resonant switched-capacitor (ReSC) converters. To compare different ReSC topologies, a normalized passive volume parameter is proposed for simple and fair comparison. This normalized passive volume parameter, along with a normalized switch stress parameter (based on switch VA ratings), can be used to visualize and compare the passive and active component utilizations among different topologies, offering a framework to compare the relative performance of different topologies.

The large number of floating switches and flying capacitors pose great challenges in practical circuit implementations. Several bootstrap and charge-pump based techniques are developed to provide gate drive power to the floating switches in a compact and efficient manner. Compared to conventional isolated dc/dc power supply chips, the proposed circuits have a simple structure and operating principle, and can be implemented with a small number of diodes, capacitors, and LDOs, leading to less occupied board area and lower implementation cost. Another crucial practical challenge is flying capacitor voltage balancing. In unbalaced operation, capacitor voltages deviate from their nominal values, potentially resulting in system failure. We experimentally investigate the origins of the voltage imbalance in practical implementations of flying capacitor multilevel (FCML) converters and present corresponding solutions. It is found that an FCML converter with an even number of levels has significantly better capacitor balancing than one with an odd number of levels, due to better inherent immunity to circuit non-idealities.

With the theoretical analysis tools and the practical circuit techniques developed above, a number of high-performance discrete hardware prototypes are designed in the context of 48 V power delivery architecture for modern data centers. Based on a novel cascaded resonant topology, a 48-to-12 V, 4-to-1 fixed-ratio, intermediate bus converter is built with 99% peak efficiency and 2500 W/in3 power density. To further increase the conversion ratio without increasing circuit complexity, the concept of multi-phase operation is introduced, along with a 6-to-1 cascaded series-parallel topology and an 8-to-1 multi-resonant-doubler topology. In addition to fixed-ratio ReSC converters, a regulated multi-level binary hybrid converter for direct 48 V to 1-2 V point-of-load applications is also developed. All of the hardware prototypes achieve the best in-class efficiency and power density simultaneously, reflecting the great potential of hybrid and resonant switched-capacitor converters for future power conversion systems.

Advisors: Robert Pilawa-Podgurski


BibTeX citation:

@phdthesis{Ye:EECS-2021-236,
    Author= {Ye, Zichao},
    Title= {Hybrid Switched-Capacitor Power Converters: Fundamental Limits and Design Techniques},
    School= {EECS Department, University of California, Berkeley},
    Year= {2021},
    Month= {Dec},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-236.html},
    Number= {UCB/EECS-2021-236},
    Abstract= {This dissertation focuses on a topological effort to drastically improve the performance of existing power electronics systems. In particular, a hybrid approach is adopted, in which both inductors and capacitors are used in the voltage conversion and power transfer process. Compared to conventional switched-capacitor (SC) converters, the augmenting inductors can greatly reduce or eliminate the capacitor charge sharing loss, and thus improve the energy utilization of the capacitors without sacrificing efficiency. This process is called soft-charging operation. In combination with other potential advantages such as soft switching and voltage regulation, hybrid SC converters show promise in the development of future high-performance power electronics systems.

This dissertation explores hybrid SC converters from three main aspects: fundamental limits and topology comparisons, practical circuit implementation challenges, and high-performance hardware demonstrations. We start by analyzing the reactive power processed by the passive components of hybrid SC converters operating in resonant mode. This analysis is applied to express and optimize the total passive component volume of resonant switched-capacitor (ReSC) converters. To compare different ReSC topologies, a normalized passive volume parameter is proposed for simple and fair comparison. This normalized passive volume parameter, along with a normalized switch stress parameter (based on switch VA ratings), can be used to visualize and compare the passive and active component utilizations among different topologies, offering a framework to compare the relative performance of different topologies.

The large number of floating switches and flying capacitors pose great challenges in practical circuit implementations. Several bootstrap and charge-pump based techniques are developed to provide gate drive power to the floating switches in a compact and efficient manner. Compared to conventional isolated dc/dc power supply chips, the proposed circuits have a simple structure and operating principle, and can be implemented with a small number of diodes, capacitors, and LDOs, leading to less occupied board area and lower implementation cost. Another crucial practical challenge is flying capacitor voltage balancing. In unbalaced operation, capacitor voltages deviate from their nominal values, potentially resulting in system failure. We experimentally investigate the origins of the voltage imbalance in practical implementations of flying capacitor multilevel (FCML) converters and present corresponding solutions.  It is found that an FCML converter with an even number of levels has significantly better capacitor balancing than one with an odd number of levels, due to better inherent immunity to circuit non-idealities.

With the theoretical analysis tools and the practical circuit techniques developed above, a number of high-performance discrete hardware prototypes are designed in the context of 48 V power delivery architecture for modern data centers. Based on a novel cascaded resonant topology, a 48-to-12 V, 4-to-1 fixed-ratio, intermediate bus converter is built with 99% peak efficiency and 2500 W/in3 power density. To further increase the conversion ratio without increasing circuit complexity, the concept of multi-phase operation is introduced, along with a 6-to-1 cascaded series-parallel topology and an 8-to-1 multi-resonant-doubler topology. In addition to fixed-ratio ReSC converters, a regulated multi-level binary hybrid converter for direct 48 V to 1-2 V point-of-load applications is also developed. All of the hardware prototypes achieve the best in-class efficiency and power density simultaneously, reflecting the great potential of hybrid and resonant switched-capacitor converters for future power conversion systems.},
}

EndNote citation:

%0 Thesis
%A Ye, Zichao 
%T Hybrid Switched-Capacitor Power Converters: Fundamental Limits and Design Techniques
%I EECS Department, University of California, Berkeley
%D 2021
%8 December 1
%@ UCB/EECS-2021-236
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-236.html
%F Ye:EECS-2021-236