Derek Chou

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2021-88

May 14, 2021

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-88.pdf

In this dissertation, methods of improving overall power electronic system density are developed and explored. Using a Level II single-phase bidirectional electric vehicle charger as a demonstration system, this work focuses on strategies that promote minimization of passive component sizes through the application of different electrical topologies, as well as the mechanical and thermal implications of such applications.

A conventional system design is presented as the baseline for improvement: in a single-phase ac-dc converter system, there exists two major functions that must be performed. First, the input ac current must be shaped to match both the shape and the phase of the input ac voltage, the power factor correction (PFC) function. Second, because the input ac current and voltage multiply and result in a twice-line frequency power pulsation, this pulsation must be managed with an energy buffer. The prototypical conventional system discussed in this work consists of a rectifier followed by a two-switch power converter shaping the input current through a physically-large boost inductor; the power ripple is then buffered by a physically-large electrolytic capacitor bank. Running these functions in reverse provides inverter (dc-ac) functionality, where the rectifier and boost PFC stage is now acting as a rectified sine-wave generator and unfolder inverter stage.

This work proposes the use of the flying-capacitor multilevel (FCML) topology in order to greatly shrink the boost inductor, which is then integrated with the series-stacked buffer (SSB) topology to greatly shrink the buffer capacitors. The FCML topology is verified at Level II charging power levels. In order to achieve the required power level, an interleaved 6-level FCML is designed and built. Mechanical design and thermal management implications are considered in the construction of the FCML prototype, which achieved Level II power levels with a custom-designed air-cooled heatsink prototype. The SSB topology is then added to the system in a full redesign that integrates all of the components into a package with high utilization of 3-D space. Again, the Level II power level necessitated a parallel design, which we prefer to interleave, so the resultant bidirectional electric vehicle charger design has two FCML stages in parallel as the boost PFC stage as well as two SSB stages in parallel as the energy buffer stage. The system is then verified operational in both the PFC and the inverter modes. In the full system prototype, a power level of 6.1 kW is achieved, running in the dc-ac mode from 400 Vdc to 240 Vac and a system density of 201 W/in^3 (12.3 W/cm^3) is reported, which includes the cold plate in a liquid-cooled thermal management system. All of the major power boards in this system are designed to be constructed with commercial parts and conventional manufacturing techniques. Therefore, they are able to be contract-manufactured, yet still achieve excellent power density figures. Finally, an exploration of the boundary condition of converter start-up is performed. The FCML topology can be heavily optimized to utilize switches with ratings lower than the dc bus voltage. This performs well at periodic steady-state, but requires extra circuitry to insulate the switches from excess voltage at start-up. An ac-side start-up technique is implemented and tested, demonstrating a start from a completely discharged state with the converter running in the ac-dc mode.

Overall, the FCML and SSB topologies are presented as a strategy to more fully utilize capacitors for their superior energy density as compared to inductors. Mechanical and thermal considerations are factored in at every stage of the design process, which provides more ways to balance the performance of the electrical system with the overall system density.

Advisors: Robert Pilawa-Podgurski


BibTeX citation:

@phdthesis{Chou:EECS-2021-88,
    Author= {Chou, Derek},
    Title= {Compact and Efficient Power Electronics System Design for Automotive, Solar, and Aerospace Applications},
    School= {EECS Department, University of California, Berkeley},
    Year= {2021},
    Month= {May},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-88.html},
    Number= {UCB/EECS-2021-88},
    Abstract= {In this dissertation, methods of improving overall power electronic system density are developed and explored. Using a Level II single-phase bidirectional electric vehicle charger as a demonstration system, this work focuses on strategies that promote minimization of passive component sizes through the application of different electrical topologies, as well as the mechanical and thermal implications of such applications. 

A conventional system design is presented as the baseline for improvement: in a single-phase ac-dc converter system, there exists two major functions that must be performed. First, the input ac current must be shaped to match both the shape and the phase of the input ac voltage, the power factor correction (PFC) function. Second, because the input ac current and voltage multiply and result in a twice-line frequency power pulsation, this pulsation must be managed with an energy buffer. The prototypical conventional system discussed in this work consists of a rectifier followed by a two-switch power converter shaping the input current through a physically-large boost inductor; the power ripple is then buffered by a physically-large electrolytic capacitor bank. Running these functions in reverse provides inverter (dc-ac) functionality, where the rectifier and boost PFC stage is now acting as a rectified sine-wave generator and unfolder inverter stage.

This work proposes the use of the flying-capacitor multilevel (FCML) topology in order to greatly shrink the boost inductor, which is then integrated with the series-stacked buffer (SSB) topology to greatly shrink the buffer capacitors. The FCML topology is verified at Level II charging power levels. In order to achieve the required power level, an interleaved 6-level FCML is designed and built. Mechanical design and thermal management implications are considered in the construction of the FCML prototype, which achieved Level II power levels with a custom-designed air-cooled heatsink prototype. The SSB topology is then added to the system in a full redesign that integrates all of the components into a package with high utilization of 3-D space. Again, the Level II power level necessitated a parallel design, which we prefer to interleave, so the resultant bidirectional electric vehicle charger design has two FCML stages in parallel as the boost PFC stage as well as two SSB stages in parallel as the energy buffer stage. The system is then verified operational in both the PFC and the inverter modes. In the full system prototype, a power level of 6.1 kW is achieved, running in the dc-ac mode from 400 Vdc to 240 Vac and a system density of 201 W/in^3 (12.3 W/cm^3) is reported, which includes the cold plate in a liquid-cooled thermal management system. All of the major power boards in this system are designed to be constructed with commercial parts and conventional manufacturing techniques. Therefore, they are able to be contract-manufactured, yet still achieve excellent power density figures. Finally, an exploration of the boundary condition of converter start-up is performed. The FCML topology can be heavily optimized to utilize switches with ratings lower than the dc bus voltage. This performs well at periodic steady-state, but requires extra circuitry to insulate the switches from excess voltage at start-up. An ac-side start-up technique is implemented and tested, demonstrating a start from a completely discharged state with the converter running in the ac-dc mode.

Overall, the FCML and SSB topologies are presented as a strategy to more fully utilize capacitors for their superior energy density as compared to inductors. Mechanical and thermal considerations are factored in at every stage of the design process, which provides more ways to balance the performance of the electrical system with the overall system density.},
}

EndNote citation:

%0 Thesis
%A Chou, Derek 
%T Compact and Efficient Power Electronics System Design for Automotive, Solar, and Aerospace Applications
%I EECS Department, University of California, Berkeley
%D 2021
%8 May 14
%@ UCB/EECS-2021-88
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-88.html
%F Chou:EECS-2021-88