Graphic Symbol Recognition Toolkit (HHRELCO) Tutorial (M03/50)
H. Hse and A. Richard Newton

Sketched Symbol Recognition Using Zernike Movements (M03/49)
H. Hse and A. Richard Newton

Logic Synthesis for Large Pass Transistor Circuits (M97/26)
P. Buch, A. Narayan, A. Richard Newton and Alberto L. Sangiovanni-Vincentelli

Engineering Change for Power Optimization Using Global Sensitivity and Synthesis Flexibility (M96/59)
P. Buch, C.K. Lennard and A. Richard Newton

Study of Simulator Sickness and the VOR with Respect to VR (M96/25)
S. Szollar and A. Richard Newton

Logic Synthesis Using Power-Sensitive Don't Care Sets (M96/8)
C.K. Lennard, P. Buch and A. Richard Newton

Microsoft Windows NT and the Competition for Desktop Computing (M94/3)
B. Peters, W.R. Bush and A. Richard Newton

Data-Flow/Event Graphs (M92/24)
G.S. Whitcomb and A. Richard Newton

Implicit Manipulation of Equivalence Classes Using Binary Decision Diagrams (M91/13)
B. Lin and A. Richard Newton

Don't Care Minimization of Multi-Level Sequential Logic Networks (M90/45)
B. Lin and A. Richard Newton

Multiple-Output Shared Transistor Logic (MOSTL) Family Synthesized Using Binary Decision Diagram (M90/21)
T. Sakurai, B. Lin and A. Richard Newton

MOSFET Model Parameter Extraction Based on Fast Simulated Diffusion (M90/20)
T. Sakurai and A. Richard Newton

A Simple MOSFET Model for Circuit Analysis and Its Application to CMOS Gate Delay Analysis and Series-Connected MOSFET Structure (M90/19)
T. Sakurai and A. Richard Newton

Exact Algorithms for Output Encoding, State Assignment and Four-Level Boolean Minimization (M89/8)
S. Devadas and A. Richard Newton

Irredundant Sequential Machines Via Optimal Logic Synthesis (M88/52)
S. Devadas, H.K.T. Ma, A. Richard Newton and Alberto L. Sangiovanni-Vincentelli

Easily Testable PLA-Based Finite State Machines (M88/47)
S. Devadas and A. Richard Newton

A Synthesis and Optimization Procedure for Fully Testable Sequential Machines (M88/14)
S. Devadas, Hi Keung Tony Ma, A. Richard Newton and Alberto L. Sangiovanni-Vincentelli

Test Generation for Sequential Finite State Machines (M87/36)
H-K. T. Ma, S. Devadas, A. Richard Newton and Alberto L. Sangiovanni-Vincentelli

On the Verification of Sequential Machines at Differing Levels of Abstraction (M86/93)
S. Devadas, H.K. Ma and A. Richard Newton

Algorithms for Hardware Allocation in Data Path Synthesis (M86/92)
S. Devadas and A. Richard Newton

Algorithms for Pipeline Scheduling and Synthesis (M86/91)
S. Devadas and A. Richard Newton

Computer-Aided Design for VLSI Circuits (M86/16)
A. Richard Newton and Alberto L. Sangiovanni-Vincentelli