Ph.D. Dissertations - Borivoje Nikolic
A Data Converter Assisted Beamforming Technique
Zhenghan Lin [2024]
Towards Scalable Sub-THz Massive MIMO: Beamforming ASICs and 3D Die-to-Die Interconnects
Harrison Liew [2024]
Automated and Process-Portable Generation of Data Converters
Zhaokai Liu [2023]
Integrated Signal Processing for Massive MIMO Systems
Yue Dai [2023]
Generator-Based Design of Custom Systems-on-Chip for Numerical Data Analysis
Alon Amid [2021]
Physically Aware Design of Generated Systems-on-Chip
John Wright [2021]
Practical Solutions to Accelerating ASIC Design Development Using Machine Learning
Keertana Settaluri [2021]
Generators for Wireless Systems Prototyping
Paul Rigge [2020]
Design Techniques for Energy-Efficient, Low Latency High Speed Wireline Links
Nick Sutardja [2019]
Agile Design of Generator-Based Signal Processing Hardware
Angie Wang [2018]
Bottom-up Memory Design Techniques for Energy-Efficient and Resilient Computing
Pi-Feng Chiu [2018]
Configurable Data Converters for Digitally Adaptive Radio
Amy Whitcombe [2018]
Rapid ASIC Design for Digital Signal Processors
Steven Bailey [2018]
Energy-Efficient System Design Through Adaptive Voltage Scaling
Ben Keller [2017]
System Architecture and Signal Processing Techniques for Massive Multi-user Antenna Arrays
Antonio Puglielli [2017]
Variability Analysis and Yield Optimization in Deep-Submicron Mixed-Signal Circuits
Katerina Papadopoulou [2017]
Design of Integrated Full-Duplex Wireless Transceivers
Sameet Ramakrishnan [2016]
Design of Reconfigurable Radio Front-Ends
Xiao Xiao [2016]
Low-Latency, High-Reliability Wireless Networks for Control Applications
Matthew Weiner [2015]
Resilient Design Techniques for Improving Cache Energy Efficiency
Brian Zimmer [2015]
Next Generation Wireless Receiver Architecture Design in Deep-Sub-Micron CMOS Technology
Chaoying Wu [2014]
System Design of Cooperative Wireless Networks
Milos Jorgovanovic [2014]
Calibration Techniques for Time-Interleaved SAR A/D Converters
Dusan Stepanovic [2012]
Cooperative Multiplexing in Wireless Relay Networks
Vinayak Nagpal [2012]
Nanoscale SRAM Variability and Optimization
Seng Oon Toh [2011]
Power-efficient Design of Multi-Gpbs Wireless Baseband
Ji-Hoon Park [2011]
Design of LDPC Decoders for Improved Low Error Rate Performance
Zhengya Zhang [2009]
Downconverting Sigma-Delta A/D Converter for a Reconfigurable RF Receiver
Renaldi Winoto [2009]
Large-Scale Variability Characterization and Robust Design Techniques for Nanoscale SRAM
Zheng Guo [2009]
Digitally Calibrated Analog-to-Digital Converters in Deep Sub-micron CMOS
Cheongyuen (Bill) Tsang [2008]
Measurement and Analysis of Variability in CMOS circuits
Liang Teck Pang [2008]
Power-Performance Tradeoffs in ASICs for Next Generation Wireless Communication Datapaths
Farhana Sheikh [2008]
A Power/Area Optimal Approach to VLSI Signal Processing
Dejan Marko Markovic [2006]
Power - Performance Optimization for Digital Circuits
Radu Zlatanovici [2006]
Analysis, Measurement and Optimization of Jitter in Phase-Locked Loops
Socrates D. Vamvakos [2005]
High Throughput VLSI Architectures for Iterative Decoders
Engling Yeo [2003]