Technical Reports - Borivoje Nikolic

Nested-Parallelism PageRank on RISC-V Vector Multi-Processors (EECS-2019-6)
Alon Amid

Variability-Aware Compact Modeling of Nano-scale Technologies with Customized Test Structure Designs (EECS-2018-148)
Ying Qiao

BOOM v2: an open-source out-of-order RISC-V core (EECS-2017-157)
Christopher Celio, Pi-Feng Chiu, Borivoje Nikolic, David A. Patterson and Krste Asanović

A Multiplying Delay-Locked Loop For A Self-Adjustable Clock Generator (EECS-2017-108)
Gary Choi

BPSK Demodulation for RF Applications (EECS-2017-91)
Yu-Ting Toh

Design of Integrated Full-Duplex Wireless Transceivers (EECS-2017-24)
Sameet Ramakrishnan and Borivoje Nikolic

Variability Characterization of Imaging Readout Integrated Circuits in Deeply Scaled CMOS (EECS-2016-183)
Amy Whitcombe

Opportunities for Fine-Grained Adaptive Voltage Scaling to Improve System-Level Energy Efficiency (EECS-2015-257)
Ben Keller

Flexible FFT Optimization and RTL Generation in the Chisel Hardware Design Language (EECS-2015-256)
Stephen Twigg

Modeling Radiation-Induced Soft Errors in Logic and the Overhead of Resiliency Techniques (EECS-2014-233)
Steven Bailey

Resilient Design Methodology for Energy-Efficient SRAM (EECS-2013-37)
Brian Zimmer, Borivoje Nikolic and Krste Asanović

Advanced MOSFET Designs and Implications for SRAM Scaling (EECS-2012-50)
Changhwan Shin

Power-efficient Design of Multi-Gpbs Wireless Baseband (EECS-2011-135)
Ji-Hoon Park and Borivoje Nikolic

A High-Throughput, Flexible LDPC Decoder for Multi-Gb/s Wireless Personal Area Networks (EECS-2010-177)
Matthew Weiner and Borivoje Nikolic

Downconverting Sigma-Delta A/D Converter for a Reconfigurable RF Receiver (EECS-2009-81)
Renaldi Winoto and Borivoje Nikolic